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RFD14N05SM9A
Typical Performance Curves
Unless Otherwise Specified (Continued)
60
10
700
600
C ISS
45
V DD = BV DSS
V DD = BV DSS
7.5
500
400
300
200
100
C OSS
C RSS
V GS = 0V, f = 1MHz
C ISS = C GS + C GD
C RSS = C GD
C OSS ≈ C DS + C GD
30
15
0
0.75 BV DSS
0.50 BV DSS
0.25 BV DSS
R L = 3.57 ?
I G(REF) = 0.4mA
V GS = 10V
5.0
2.5
0
G ( REF )
G ( ACT )
I G ( REF )
G ( ACT )
0
0
5 10 15 20
25
I
20 ----------------------
I
t, TIME ( μ s)
80 ----------------------
I
V DS , DRAIN TO SOURCE VOLTAGE (V)
FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
NOTE: Refer to Fairchild Application Notes AN7254 and AN7260,
FIGURE 13. NORMALIZED SWITCHING WAVEFORMS FOR
CONSTANT CURRENT GATE DRIVE
Test Circuits and Waveforms
V DS
BV DSS
L
t P
V DS
VARY t P TO OBTAIN
REQUIRED PEAK I AS
R G
+
V DD
I AS
V DD
V GS
DUT
-
0V
t P
I AS
0.01 ?
0
t AV
FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 15. UNCLAMPED ENERGY WAVEFORMS
t ON
t OFF
V DS
V DS
t d(ON)
90%
t r
t d(OFF)
t f
90%
V GS
R L
DUT
+
-
V DD
0
10%
90%
10%
R GS
V GS
50%
50%
V GS
0
10%
PULSE WIDTH
FIGURE 16. SWITCHING TIME TEST CIRCUIT
?2004 Fairchild Semiconductor Corporation
FIGURE 17. RESISTIVE SWITCHING WAVEFORMS
RFD14N05SM 9A Rev. C1
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